The present disclosure relates to an image forming apparatus including a plurality of control units which operate in synchronization with clock signals and configured to carry out a decentralized control and particularly to a technique for calculating an error of a clock signal.
Conventionally, there is known an image forming apparatus including a plurality of control units which operate in synchronization with clock signals and configured to carry out a decentralized control. To accurately synchronize the operation of each control unit, the time accuracy of the clock signal of each control unit needs to be high. However, an oscillator for generating a clock signal with a high time accuracy is expensive. Accordingly, in such an image forming apparatus, an error of a clock signal is calculated so as not to cause a large difference in the accuracy of an operation controlled by each control unit. Then, this image forming apparatus corrects a control parameter relating to the operation based on the calculated error of the clock signal.
For example, the following conventional technique is known. A master CPU transmits communication data to a slave CPU at a transmission interval which is a predetermined multiple of a cycle of a clock signal of the master CPU. The slave CPU counts a clock number of the clock signal during the period of the transmission interval of the communication data transmitted from the master CPU using a clock signal of the slave CPU. The slave CPU calculates a frequency (cycle) of the clock signal of the slave CPU using that count value and the above transmission interval. Then, the slave CPU sets a difference between the calculated frequency (or cycle) and a frequency (or cycle) of a predetermined clock signal of the slave CPU as an error of the clock signal of the slave CPU.
In this way, only a clock signal generation circuit of the master CPU can be configured by an expensive oscillator for generating a clock signal with a high time accuracy. On the other hand, a clock signal generation circuit of the slave CPU can be configured by an inexpensive oscillator for generating a clock signal with a low time accuracy.
In the above technique, the clock number of the clock signal of the slave CPU is counted during the period of the transmission interval of the communication data transmitted from the master CPU. Thus, the transmission interval of the communication data from the master CPU needs to be longer than the cycle of the clock signal of the slave CPU. Further, to accurately calculate the error of the frequency (or cycle) of the clock signal of the slave CPU, the transmission interval of the communication data needs to be precisely set to be the predetermined multiple of the cycle of the clock signal of the master CPU.
However, to conduct data communication at the transmission interval that is the predetermined multiple of the cycle of the clock signal of the master CPU, a conversion circuit is necessary which converts the clock signal of the master CPU into a clock signal which oscillates at the transmission interval that is the predetermined multiple of the cycle of the clock signal of the master CPU. In this conversion process of the clock signal, the transmission interval may not be precisely the predetermined multiple of the cycle of the clock signal of the master CPU due to the conversion accuracy of the conversion circuit. In this case, the slave CPU calculates an error of the clock signal of the slave CPU using the transmission interval that is not precisely the multiple of the cycle of the clock signal of the master CPU. This may lead to a possibility that the error of the clock signal of the slave CPU is not accurately calculated.
The present disclosure aims to accurately calculate an error of a clock signal in an image forming apparatus including a plurality of control units which operate in synchronization with clock signals and configured to carry out a decentralized control.